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april 2007 rev 1 1/31 AN2507 application note high-power camera flash led driver with i 2 c? introduction this application note explains the design of a flash led driver using the stcf03 device, which is a buck-boost current mode converter with an i 2 c interface. the schematic, functional description, recommendations for pcb layout and external components selection are also discussed in this application note. this device is designed for driving a single led with a forward voltage range from 2.7 to 5 v. a detailed functional description can be found below. package and demo board top view version a version b - version c www.st.com
contents AN2507 2/31 contents 1 schematic description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 selection of external components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 input and output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 led selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 r fl selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.5 r tr selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.6 ntc and r x resistor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 pcb design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.1 pcb design rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2 pcb layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2.1 a four-layer pcb with application area 45.1 mm 2 for bga package, version b 10 3.2.2 a two-layer pcb with application area 72.4 mm 2 for qfn package . . . 13 3.2.3 a four-layer pcb with application area 45.1 mm 2 for bga package, version c 14 4 internal registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.1 accessing the internal registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5 operation modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.1 shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.2 shutdown mode with the ntc-feature activated . . . . . . . . . . . . . . . . . 17 5.3 ready mode and ntc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.4 torch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.5 flash mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6 the status register and the atn pin . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6.1 the status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7 reading and writing to the st cf03 registers through the i 2 c bus . . 22
AN2507 contents 3/31 7.1 writing to a single register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.2 writing to multiple registers with incremental addressing . . . . . . . . . . . . 22 7.3 reading from a single register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7.4 reading from multiple registers with incremental addressing . . . . . . . . . 23 8 examples of register setup for each mode . . . . . . . . . . . . . . . . . . . . . . 24 8.1 example 1: 600 ma flash with 700 ms duration . . . . . . . . . . . . . . . . . . 24 8.2 example 2: 25 ma torch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 8.3 example 3: an auxiliary led running at 10 ma for 500 ms . . . . . . . . . . . 26 8.4 example 4: red-eye reduction (multiple short flashes) . . . . . . . . . . . . . . 27 8.5 example 5: a flash pulse longer than 1.5 s . . . . . . . . . . . . . . . . . . . . . 28 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
list of tables AN2507 4/31 list of tables table 1. recommended components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 2. accessibility of internal registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 3. command register data to enter shutdown mode (version b) . . . . . . . . . . . . . . . . . . 17 table 4. command register data to enter shutdown mode (version a and c) . . . . . . . . . . . . . 17 table 5. command register data to enter shutdown mode with ntc activated (version a and c) 18 table 6. command register data to enter ready mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 7. command register data to enter ready mode with ntc on . . . . . . . . . . . . . . . . . . . . . 18 table 8. command register data to enter torch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 9. command register data to enter flash mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 10. status register bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 11. effect of the status register bits on the operation of the device . . . . . . . . . . . . . . . . . . . 21 table 12. torch mode and flash mode dimming registers settings. . . . . . . . . . . . . . . . . . . . . . . 24 table 13. command register data to enter flash mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 14. dimming register data for the flash mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 15. i 2 c data packet for activating the flash mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 16. command register data for the torch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 17. dimming register data for the torch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 18. i 2 c data packet to activate torch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 19. i 2 c data packet for terminating the torch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 20. command register data for the aux_led . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 21. command register data for the aux_led . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 22. i 2 c data packet for activating the ready mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 23. i 2 c data packet for activating the aux_led . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 24. command register data for flash mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 25. dimming register data for the flash mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 26. i 2 c data packet for activating the flash mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 27. i 2 c data packet for activating the flash mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 28. 1 st i 2 c data packet to restart the flash mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 29. 2 nd i 2 c data packet for restart of the flash mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 30. 3 rd i 2 c data packet to restart the flash mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 31. revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
AN2507 list of figures 5/31 list of figures figure 1. a typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. ntc connection for versions with internal voltage reference . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 3. top layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 4. middle layer 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 5. middle layer 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 6. bottom layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 7. top overlay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 8. top layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 9. bottom layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 10. top overlay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 11. top layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 12. middle layer 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 13. middle layer 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 14. bottom layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 15. top overlay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 16. splitting the flash pulse into several shorter pulses . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 17. writing to a single register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 18. writing to multiple registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 19. reading from a single register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 20. reading from multiple registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 21. multiple flashes handled by the trig pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 8 figure 22. i 2 c bus packets timing for a flash lasting longer than ftim max . . . . . . . . . . . . . . . . . . 30
schematic description AN2507 6/31 1 schematic description the flash led driver stcf03 has a high operational frequency (1.8 mhz) which allows the usage of small-sized external components. the three versions (a, b and c) differ in the way the ntc feature is supported. 1.1 application schematic figure 1. a typical application schematic note: ** connect to v i , or gnd or sda or scl to choose one of the 4 different i 2 c slave addresses note: *** optional components to support auxiliary functions version a: stcf03pnr - qfn package, external reference for ntc protection version b: stcf03itbr - bga package, internal reference for ntc protection version c: stcf03tbr - bga package, external reference for ntc protection
AN2507 selection of external components 7/31 2 selection of external components 2.1 input and output capacitor selection it is recommended to use ceramic capacitors wi th low esr as input and output capacitors. it is recommended to use 10 f/6.3 v as a minimum value of input capacitor and 1 f/ 6.3 v as an optimal value of output ca pacitor to achieve good stabilit y of the device supplied from low input voltage (2.7 v) at maximum ratings of output power. note: see recommended components in ta bl e 1 . 2.2 inductor selection a thin shielded inductor with a low dc series resistance of winding is recommended for this application. to achieve a good efficiency in step-up mode, it is recommended to use an inductor with a dc series resistance r dcl = r d /10 [ ?, ? , 1], where r d is the dynamic resistance of the led [ ?, ? , 1]. for nominal operation, the peak inductor current can be calculated by the following formula: equation 1 where: i peak : peak inductor current i out : current sourced at the vout-pin n: efficiency of the stcf03 v out : output voltage at the vout-pin v in : input voltage at the vbat-pin l: inductance value of the inductor f: switching frequency note: see recommended components in ta bl e 1 . 2.3 led selection all leds with a forward voltage range ranging from 2.7 v to 5 v are compatible with stcf03. the forward voltage spread of any selected led must however lay within this range (2.7 v to 5 v). it is possible to set the level of the led current in flash mode and torch mode by setting the values of the corresponding sensing resistors. the level of the led current in flash mode can be set by changing the external flash resistor. note: see recommended components in ta bl e 1 . i peak i out n ----------- - ?? ?? v out v in ? () v in 2 ? 2l ? f ? v out 2 ? ---------------------------------------------------- - ?? ?? ?? + ?? ?? ?? v out v in -------------- ? =
selection of external components AN2507 8/31 2.4 r fl selection the value of the r fl resistor can be calculated by the following equations: r fl = v fb2 /i flash where v fb2 = 226 mv and p rflash = r fl * i flash 2 , where p rfl is the power dissipated on the r fl resistor. it is recommended to use a thin metal film resistor with 0805 package size and 1% tolerance. the maximum led current in flash mode for stcf03 is (800 ma) for a battery voltage ranging from 2.7 v to 5.5 v in vqfpn version. 2.5 r tr selection the value of the r tr resistor can be calculated by following equations: equation 2 where p rtorch is the power dissipated on the r tr resistor. it is recommended to follow the equation r tr = 6.66* r fl to avoid any jump in the current dimming values. it is recommended to use a thin metal film resistor with 1% or 5% tolerance. the maximum led current in torch mode for sctf03 is 200 ma for a battery voltage ranging from 2.7 v to 5.5 v 2.6 ntc and r x resistor selection a) a, c versions without an internal reference voltage for the ntc feature. stcf03 requires a negative thermistor (ntc) for sensing the led temperature, as well as an r x resistor and an external voltage reference in order to use the ntc feature. please refer to the typical ap plication schematic in figure 1 ver a,c for more details. once the ntc feature is activated, the internal switch connects the r x resistor to the ntc, and this creates a voltage divider supplied by the external reference voltage connected to the ntc. if the temperature of the ntc-thermistor rises due to the heat dissipated by the led, the voltage on the ntc pin increases. when this voltage exceeds 0.56 v, the ntc_w bit in the status register is set to high, and the atn pin is set to low to inform the microcontroller that the led is becoming hot. the ntc_w bit is cleared by reading the status register. if the voltage on the ntc pin rises further and exceeds 1.2 v, the ntc_h bit in the status register is set to high, and the atn pin is set to low to inform the microcontroller that the led is too hot and the device goes automatica lly to the ready mode to avoid damaging the led. this status is latched, until the microcontroller reads the status register. reading the status register clears the ntc_h bit. the selection of the ntc and r x resistors values strongly depends on the power dissipated by the led and all components surrounding the ntc-thermistor and on the cooling capabilities of each specific application. the r x and the ntc values in ta bl e 1 below work well in the demo board presented in this application note. a real application may require a different type of ntc-thermistor to achieve optimal thermal protection. r tr v ref i torch r fl ? ? i torch -------------------------------------------------------- ?? ?? = p rtorch r tr i torch 2 ? = and
AN2507 selection of external components 9/31 the procedure to activate the ntc-feature is described in section 5.2 . b) versions with an internal reference voltage for the ntc. this version requires a different connection between the r x and ntc resistors. see figure 2 below or figure 1 version b. figure 2. ntc connection for versions with internal voltage reference note: versions with internal reference voltage do not support the shutdown+ntc mode, because the internal reference voltage is off in shutdown mode. ntc rx to optional a/d converter ntc thermistor r x resistor stcf03 table 1. recommended components component manufacturer part number value size c i tdk c1608x5r0j106m 10 f 0603 c o tdk c1608x5r0j105m 1 f 0603 l tdk vlf4012at-4r7m1r1 4.7 h 3.7 x 3.5 x 1.2 mm ntc murata ncp21wf104j03ra 100 k ? 0805 r fl tyco rl73k1jr27jtd 0.27 ? 0603 r tr rohm mcr01mzpj6r20 1.8 ? 0402 r x rohm mcr01mzpj15k 15 k ? 0402 led luxeon led lxcl-pw1
pcb design AN2507 10/31 3 pcb design 3.1 pcb design rules stcf03 is a powerful switching device where the pcb must be designed in line with switched supplies design rules. the power tracks (or wires in demo-board) must be as short as possible and wide enough, because of the high currents involved. it is recommended to use a 4 layers pcb to get the best performance. all external components must be placed as close as possible to stcf03. all high-energy switched loops should be as small as possible to reduce emi. most of leds need efficient cooling, which could be done by using a dedicated copper area on the pcb. please refer to the selected led's reference guide to design the heatsink. place the r fl resistor as close as possible to the pgnd pins and the ground pin of the cout capacitor. in case a modification of any pcb layer is required, it is highly recommended to use enough vias. place the ntc resistor as close as possible to the led for good temperature sensing. direc t connection between gnd and pgnd is necessary in order to achieve correct output current value. no led current should flow through this track! voltage sensing on the r fl resistor must to done on a track from ball fb2 and directly connected to the r fl resistor. again, no current should flow through this track. pin fb2s must be connected to the r fl resistor pin. vias connecting the stcf03 pins to the copper tracks (if used) must be 0.1 mm in diameter for bga version. it is recommended to use the filled vias. 3.2 pcb layout 3.2.1 a four-layer pcb wi th applicati on area 45.1 mm 2 for bga package, version b (for version c is layout exactly same except the ntc connection, see figure 1 ) figure 3. top layer
AN2507 pcb design 11/31 figure 4. middle layer 1 figure 5. middle layer 2
pcb design AN2507 12/31 figure 6. bottom layer figure 7. top overlay
AN2507 pcb design 13/31 3.2.2 a two-layer pcb with application area 72.4 mm 2 for qfn package figure 8. top layer figure 9. bottom layer
pcb design AN2507 14/31 figure 10. top overlay 3.2.3 a four-layer pcb wi th applicati on area 45.1 mm 2 for bga package, version c figure 11. top layer
AN2507 pcb design 15/31 figure 12. middle layer 1 figure 13. middle layer 2
internal registers AN2507 16/31 figure 14. bottom layer figure 15. top overlay 4 internal registers 4.1 accessing the internal registers there are 4 internal registers in stcf03 (which are the command, dimming, aux_led and status registers). the status register is read-only. the command register can be accessed in any operation mode. all the other registers can be accessed in any mode, except in shutdown mode. when the device enters shutdown mode, the dimming, aux_led and status registers are cleared. the command register value remains untouched when entering shutdown mode. ta b l e 2 shows the accessibility of each register in all operation modes.
AN2507 operation modes 17/31 5 operation modes 5.1 shutdown mode shutdown mode is entered after the power-on reset. this mode is mainly used to decrease the power consumption of the device. during this mode, only the i 2 c interface is alive. the only thing which can be done in shutdown mode is to access the command register. entering shutdown mode by writ ing to the command register aborts any running operation and clears the values of the dimming, aux_led and status registers. the command register value is not af fected by entering shutdown mode. the following data must be written to the command register to enter shutdown mode. 5.2 shutdown mode with the ntc-feature activated this mode is supported only in version a, which does not have any internal voltage reference for the ntc feature. when this operation mode is activated, the microcontroller can still monitor the ntc voltage through it s a/d converter, while stcf03 remains in shutdown mode and therefore saves power. the following data must be written to the co mmand register to enter shutdown mode + ntc. table 2. accessibility of internal registers register address mode shutdown value poweron reset value shutdown ready torch flash command 00 read / write read / write read / write read / write untouched cleared dimming 01 inaccessible read / write read / write read / write cleared cleared aux_led 02 inaccessible read / write read / write read / write cleared cleared status 03 inaccessible read only read only read only cleared cleared table 3. command register data to enter shutdown mode (version b) cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 0xxxx x x x msb lsb table 4. command register data to en ter shutdown mode (version a and c) cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 0xx0x x x x msb lsb
operation modes AN2507 18/31 5.3 ready mode and ntc the ready mode allows the user to access all the internal registers. the ntc feature can be activated in this mode and the temperature of the led can be sensed by the a/d converter of the microcontroller. the following data must be written to the command register to enter ready mode. the following data must be written to the command register to activate the ntc feature. as soon as the ntc feature is activated, the internal switch connects the ntc resistor to the r x resistor, thereby creating a voltage divider. the voltage on this divider can be, if desired, monitored by the a/d converter of the microcontroller. an external voltage reference must be connected to the ntc to use this feature (only in version a and c). the bits ntc_w and ntc_h of the status register will not be properly set if ther e is no external reference voltage connected to the ntc (only in version a and c). if the ntc feature is not going to be used, neither the negative thermistor, nor the external reference needs to be connected. in this case, it is recommended to ground the rx pin. as the ntc feature is automatically activated during the flash and torch mode, leaving the rx pin floating could lead to unwanted interruptions of the light due to non-defined voltages on the rx pin 5.4 torch mode this mode is intended to be used for low light intensities. the led current in the torch mode can be adjusted in a range from 15 ma up to 200 ma. the torch mode is activated by writing the following data to the command register. table 5. command register data to enter s hutdown mode with ntc activated (version a and c) cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 0xx1x x x x msb lsb table 6. command register data to enter ready mode cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 1000x x x x msb lsb table 7. command register data to enter ready mode with ntc on cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 1001x x x x msb lsb
AN2507 operation modes 19/31 the dimming register value (tdim) must be set as well, unless it has already been set during a previous operation. if tdim register is not set, then the default output current value will be at the minimum. there is no internal timer which controls t he torch duration. therefore, as soon as the torch mode is activated, it remains active until a new mode is entered by writing a new data to the command register. if the torch mode was terminated by entering ready or flash mode, it can be restarted again by writing the corresponding data to the command register only, because entering any of the ready and flash modes does not influence the tdim value. if the torch mode was terminated by entering into shutdown mode, then the tdim value must be set again during the restart of the torch, bec ause entering the shutdown mode clears the tdim value. as soon as the torch mode is activated, the ntc feature is automatically activated too in order to protect the led agains t overheating. the ntc feature will be activated even if the ntc_on bit in the command register is set to zero. 5.5 flash mode this mode is intended to be used for high light intensities. the led current in the flash mode can be adjusted up to 800 ma with the input voltage ranging from 3.3 v up to 5.5 v. the flash mode is activated by writing th e following data to the command register. the dimming register value (fdim) must be set as well, unless it has already been set during a previous operation. the activation of the flash mode requires the trig pin to be high. the flash mode is active only when the trig_en bit in the command register is set to 1 and the trig pin is high. this gives the user the possibility to choose between a soft and a hard triggering of the flash mode. the soft triggering is done by writing data to the internal registers only, while the trig pin is permanently kept high, that is, by connecting it to vbat. this saves one pin of the microcontroller, which can be used for a different purpose, but this way of triggering is less accurate than the hard one. the second disadvantage of this solution is that the flash duration can only be set in discrete steps of the internal timer (1 step = approx. 100 ms). table 8. command register data to enter torch mode cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 101xx x x x msb lsb table 9. command register data to enter flash mode cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 11xxx x x x msb lsb
operation modes AN2507 20/31 hard-triggering of the flash mode requires the microcontroller to manage the trig pin. the command and the dimming registers are loaded with data before the trig pin is set to high. this allows th e user to avoid the i 2 c-bus latency. flash mode then starts as soon as the trig pin is set to high. it takes typically about 0.7 ms to ramp-up the led current to the adjusted value. this time may vary according to the led current value and the battery voltage. when the trig pin is kept high long enough, the internal timer reaches zero and the flash mode is over. as soon as the flash is timed out, the atn pin is pulled down for 11s to inform the microcontroller that the status register was updated and that the flash is over. if the trig pin is set to low before the internal timer reaches zero, the flash mode will be interrupted and can be restarted by setting the trig pin to high again . the internal timer is stopped while the trig pin is low. this means that the user can split the flash into several pulses of a total length equal to the ftim value. figure 16 below shows splitting of the flash into several shorter pulses. the cumulative length of all the pulses is determined by the ftim value. figure 16 shows the case for ftim = 9 (900 ms flash time). the cumulative time when the trig pin is high is 1000 ms (5 pulses 200 ms long). the last flash pulse will be100ms long only. the reason is that the internal flash timer reaches zero and the trig_en bit is set to 0. figure 16. splitting the flash pulse into several shorter pulses hard triggering allows therefore a smooth setting of the flash duration. the resolution is about 8.8s. the minimum flash duration is limited by the ramp-up time of the led current and the maximum is limited by the ftim value. if it is necessary to make a flash pulse longer than the maximum allowed by ftim, then it is necessary to reload the command register before the internal timer reaches zero (start a new flash before the previous one elapses). see section 8.5 - example 5 for more details. trig pin 100 ms 200 ms trig_en bit i 2 c bus packet 1300 ms led current time when the internal flash timer reaches 0 9 8 7 6 5 4 3 2 1 0 internal flash timer values
AN2507 the status register and the atn pin 21/31 6 the status register and the atn pin 6.1 the status register a detailed description of each bit is stated in the datasheet. table 10. status register bits bit name n/a f_run led_f ntc_w ntc_h ot_f n/a voutok_n msb lsb table 11. effect of the status register bits on the operation of the device bit name f_run (stat_reg) led_f (stat_reg) ntc_w (stat_reg) ntc_h (stat_reg) ot_f (stat_reg) voutok_n (stat_reg) default value 0 0 0 0 0 0 latched (1) no yes yes yes yes yes forces ready mode when set no yes no yes yes yes sets atn low when set no yes yes yes yes yes 1. yes means that the bit is set by internal signals and is reset to its default value by an i 2 c-read operation of stat_reg; no means that the bit is set and reset by internal signals in real-time when the status register is latched , reading and writing to the registers is still possible, but the bits trig_en and tch_on in the command register and auxl register cannot be changed, until the device is unlatched. it is necessary to read the status register to unlatch the device. the atn pin is also pulled down when the internal timer reaches zero in flash mode. in this case the atn pin is pulled down for 11 s only. it is recommended to connect the atn pin to the interrupt input of the microcontroller. if it is not connected to the in terrupt input, the atn pin should be pulled fast enough not to miss the 11 s pulse, that is, by a programming loop which is entered after start of the flash mode. this loop runs until the atn pin gets low. it is recommended to make a time-out of such a loop.
reading and writing to the stcf03 registers through the i2c bus AN2507 22/31 7 reading and writing to the stcf03 registers through the i 2 c bus 7.1 writing to a single register writing to a single register starts with a start-bit followed by the 7-bit device address of stcf03. the 8-th bit is the r/w bit, which is 0 in this case. r/w = 1 means a reading operation. then the master awaits an acknowledgement from stcf03. the 8-bit address of the desired register is sent a fterwards to stcf03. it will also be followed by an acknowledge pulse. the last transmitted byte is the data that is going to be written into the register. it is followed again by an acknowledge pulse from stcf03. then the master generates a stop- bit and the communication is over. see figure 17 below. figure 17. writing to a single register 7.2 writing to multiple registers with incremental addressing it would be unpractical to send several times the device address and the address of the register when writing to multip le registers. stcf03 supports wr iting to multiple registers with incremental addressing. when data is written to a register, the register address is automatically incremented (by one), and therefore the next data can be sent without sending again the device address and the register address. see figure 18 below. figure 18. writing to multiple registers s t a r t device address 7 bits a c k w r i t e m s b l s b r / w a c k address of register data a c k a c k s t o p m s b m s b l s b l s b sda line s t a r t device address 7 bits a c k w r i t e m s b l s b r / w a c k address of register i data i a c k a c k s t o p m s b m s b l s b l s b data i+1 a c k l s b data i+2 a c k l s b data i+2 l s b data i+n a c k m s b m s b m s b m s b m s b a c k l s b sda line
AN2507 reading and writing to the stcf03 registers through the i2c bus 23/31 7.3 reading from a single register the reading operation starts with a start-bit followed by 7 bit device address of stcf03. the 8-th bit is the r/w bit, which is 0 in this case. stcf03 confirms the receiving of the address + r/w bit by an acknowledge pulse. the address of the register which should be read is sent after and confirmed by an acknowledge pulse from stcf03 again. then the master generates a start-bit again and sends the device address followed by the r/w-bit, which is 1 now. stcf03 confirms the receiving of the address + r/w-bit by an acknowledge pulse, and starts to send data to the master. no acknowledge pulse from the master is required after receiving the data. then the master generates a stop-bit to terminate the communication. see the figure 19 below. figure 19. reading from a single register 7.4 reading from multiple registers with incremental addressing reading from multiple registers starts in the same way as reading from a single register. as soon as the first register is read, the register address is automatically incremented. if the master generates an acknowledge pulse after receiving the data from the first register, then reading from the next register can start immediately without having to send once more the device and the register addresses. the last acknowledge pulse before the stop-bit is not required. see figure 20 below. figure 20. reading from multiple registers s t a r t device address 7 bits a c k w r i t e m s b l s b r / w address of register a c k m s b l s b s t a r t a c k r / w r e a d device address 7 bits data l s b s t o p n o a c sda line s t a r t device address 7 bits a c k w r i t e m s b l s b r / w address of register i a c k m s b l s b s t a r t a c k r / w r e a d device address 7 bits data i a c k s t o p l s b data i+1 a c k l s b data i+2 a c k l s b data i+2 l s b data i+n m s b m s b m s b m s b a c k l s b n o a c k sda line
examples of register setup for each mode AN2507 24/31 8 examples of register setup for each mode a device address 0x62 is used in all the example below. the stcf03 is configured to this device address, if the add pin is connected to vbat pin. in the demoboard the device address is 0x60 because the add pin is connected to gnd. note: led current values refer to r fl = 0.27 ohm, r tr = 1.8 ohm 8.1 example 1: 600 ma fl ash with 700 ms duration let's suppose that r fl = 0.27 ? . the targeted value of the flash current is 600 ma and the flash duration should be 700 ms. the reference voltage must be set to 160 mv to achieve a 600 ma flash current with a 0.27 ? sensing resistor. the value of fdim (4 bits) must be set to 0xd to set up the reference voltage to 160 mv. (see ta bl e 1 2 ) the flash duration timer can be set to 100ms up to 1500 ms in 100ms increments. if the desired flash duration is 700 ms the value ftim (4 bits) must be set to 0x7. bit pwr_on of the command register must be set to 1. bit trig_en of the command register must be set to 1. bit tch_on of the command register must be set to 0. bit ntc_on of the command register can be set to any value, because ntc is automatically on when the flash mode is active. setting this bit to 0 will not switch off the ntc. table 12. torch mode and flash mode dimming registers settings t_dim (hex) 0123456789abcdef f_dim (hex) 0 1 2 3 4 5678 9abcdef led current [ma] 16 19 23 27 32 39 46 55 65 77 92 109 124 147 175 209 248 296 352 418 498 592 705 840 internal step 1 2 3 4 5 6 7 8 9 10 1112131415161718192021222324 v ref1 [mv] 33 40 47 56 67 80 95 113 134 160 190 227 33 40 47 56 67 79 95 113 134 160 190 227 sense resist. r fl + r tr r fl + r tr r fl + r tr r fl + r tr r fl + r tr r fl + r tr r fl + r tr r fl + r tr r fl + r tr r fl + r tr r fl + r tr r fl + r tr r fl r fl r fl r fl r fl r fl r fl r fl r fl r fl r fl r fl table 13. command register data to enter flash mode cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 11xx0 1 1 1 msb lsb
AN2507 examples of register setup for each mode 25/31 it is necessary to write 4 bytes to stcf03 to make a flash. 8.2 example 2: 25 ma torch let's suppose that r fl = 0.27 ? , r tr = 1.8 ? and the targeted value of the torch current is 25 ma. the reference voltage must be set to 56 mv to achieve 25 ma in torch mode with the resistor values mentioned above. the value of tdim (4 bits) must be set to 0x3 to set up the reference voltage to 56 mv. bit pwr_on of the command register must be set to 1. bit trig_en of the command register must be set to 0. bit tch_on of the command register must be set to 0. bit ntc_on of the command register can be set to any value, because ntc is automatically on, when torch mode is active. setting this bit to 0 does not switch off the ntc. table 14. dimming register data for the flash mode dim_reg tdim_3 tdim_2 tdim_1 tdim_0 fdim_3 fdim_2 fdim_1 ftim_0 00001 1 0 1 msb lsb table 15. i 2 c data packet for activating the flash mode byte hex binary comment 1 62 0 1 1 0 0 0 1 0 device address + r/w bit 2 00 0 0 0 0 0 0 0 0 command register address 3 d7 1 1 0 1 0 1 1 1 data of the command register 4 0d 0 0 0 0 1 1 0 1 data of the dimming register table 16. command register data for the torch mode cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 10110 0 0 0 msb lsb table 17. dimming register data for the torch mode dim_reg tdim_3 tdim_2 tdim_1 tdim_0 fdim_3 fdim_2 fdim_1 fdim_0 00110 0 0 0 msb lsb
examples of register setup for each mode AN2507 26/31 it is necessary to write 4 bytes to the stcf03 to run the torch mode. the duration of the torch mode is "unlimited" . torch mode is termin ated by setting the tch_on bit in the command register to 0. termination of the torch mode can be done by writing the following data to stcf03. this puts the stcf03 into ready mode. 8.3 example 3: an auxiliary le d running at 10 ma for 500 ms stcf03 must be into ready mode (both bits trig_en and tch_on are 0) to activate the auxiliary led. a 10 ma output current is reached when auxi is set to 0x8. auxt must be set to 0x5 to have a 500 ms duration of the auxiliary led lighting. table 18. i 2 c data packet to activate torch mode byte hex binary comment 1 62 0 1 1 0 0 0 1 0 device address + r/w bit 2 00 0 0 0 0 0 0 0 0 command register address 3 b0 1 0 1 1 0 0 0 0 data of the command register 4 30 0 0 1 1 0 0 0 0 data of the dimming register table 19. i 2 c data packet for terminating the torch mode byte hex binary comment 1 62 0 1 1 0 0 0 1 0 device address + r/w bit 2 00 0 0 0 0 0 0 0 0 command register address 3 80 1 0 0 0 0 0 0 0 data of the command register table 20. command register data for the aux_led cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 10000 0 0 0 msb lsb table 21. command register data for the aux_led aux_led aux_3 aux_2 aux_1 aux_0 aux_3 aux_2 aux_1 aux_0 10000 1 0 1 msb lsb
AN2507 examples of register setup for each mode 27/31 writing the 3 bytes below to st cf03 puts it into ready mode. this can be skipped if it already is in ready mode. writing the following 3 bytes to stcf03 will activate the auxiliary led for the desired time. 8.4 example 4: red-eye reduction (multiple short flashes) there are two ways to manage this task. the first one is to use hardware triggering of the flashes through the trig pin. this is the most suitable and recommended solution, as it reduces the usage of the i 2 c bus and the length of each flash pulse can be adjusted continuously. the second solution is to use the software triggering feature, which means a periodical reloading of the command register. this however increases traffic on the i 2 c bus and the flashes can only have length, adjustable in 100 ms increments only. let's suppose that r fl = 0.27 ? and the targeted value of the flash current is 600 ma. the task is to make 5 flashes of 200 ms duration with 100 ms pause between them. the setting of the reference voltage is identical to the one in section 8.1 . the flash timer (ftim) is set to 0xf, which represents 1.5 s. table 22. i 2 c data packet for activating the ready mode byte hex binary comment 1 62 0 1 1 0 0 0 1 0 device address + r/w bit 2 00 0 0 0 0 0 0 0 0 command register address 3 80 1 0 0 0 0 0 0 0 data of the command register table 23. i 2 c data packet for activating the aux_led byte hex binary comment 1 62 0 1 1 0 0 0 1 0 device address + r/w bit 2 02 0 0 0 0 0 0 1 0 auxiliary led register address 38510000101 data of the auxiliary led register table 24. command register data for flash mode cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 11011 1 1 1 msb lsb table 25. dimming register data for the flash mode dim_reg tdim_3 tdim_2 tdim_1 tdim_0 fdim_3 fdim_2 fdim_1 fdim_0 00001 1 0 1 msb lsb
examples of register setup for each mode AN2507 28/31 the data packet which has to be sent is in the table below. the picture below shows the trig pin and the i 2 c bus timings. figure 21. multiple flashes handled by the trig pin 8.5 example 5: a flash pu lse longer than 1.5 s let's suppose that r fl = 0.27 ? and the targeted value of the flash current is 600 ma. the task is to make a single flash pulse with a 4 seconds duration. it is necessary to reload ftim in the command register before the internal flash timer reaches zero. this guarantees that the flash does go on and does not stop after 1.5 sec. the first packet must contain also the dimming register data, if they are different from those which were used in the previous operation. packet 1 sets flash mode with 1.5 s duration and the proper dimming. table 26. i 2 c data packet for activating the flash mode byte hex binary comment 1 62 0 1 1 0 0 0 1 0 device address + r/w bit 2 00 0 0 0 0 0 0 0 0 command register address 3 df 1 1 0 1 1 1 1 1 data of the command register 4 0d 0 0 0 0 1 1 0 1 data of the dimming register trig pin 100 ms 200 ms trig_en bit i 2 c bus packet 1400 ms table 27. i 2 c data packet for activating the flash mode byte hex binary comment 1 62 0 1 1 0 0 0 1 0 device address + r/w bit 2 00 0 0 0 0 0 0 0 0 command register address 3 df 1 1 0 1 1 1 1 1 data of the command register 4 0d 0 0 0 0 1 1 0 1 data of the dimming register
AN2507 examples of register setup for each mode 29/31 packet 2 sets flash mode with 1.5 s duration. dimming is not set again as it is same as before. packet 3 sets flash mode with 1.5 s duration. dimming remains untouched. packet 4 sets flash mode with 1 s duration. dimming remains untouched. please refer to figure 22 for more details about the i 2 c-bus packets timing. the solution described above is using a software termination of the flash pulse. (it is timed out by the internal timer.) the flash pulse could be also terminated by setting the trig pin to low after 4 seconds. in this case, the fourth packet could be the same as packets packet 2 and packet 3 , because the timing of the flash is done by the trig pin and it is not necessary to change the value of ftim in the command register. this way of periodical reloading of the command register can be used to achieve a continuous flash light. in this case, it is very strongly recommended to guarantee an efficient cooling of both the led and the chip, otherwise the light can be interrupted by activation of the thermal protections. table 28. 1 st i 2 c data packet to restart the flash mode byte hex binary comment 1 62 0 1 1 0 0 0 1 0 device address + r/w bit 2 00 0 0 0 0 0 0 0 0 command register address 3 df 1 1 0 1 1 1 1 1 data of the command register table 29. 2 nd i 2 c data packet for restart of the flash mode byte hex binary comment 1 62 0 1 1 0 0 0 1 0 device address + r/w bit 2 00 0 0 0 0 0 0 0 0 command register address 3 df 1 1 0 1 1 1 1 1 data of the command register table 30. 3 rd i 2 c data packet to restart the flash mode byte hex binary comment 1 62 0 1 1 0 0 0 1 0 device address + r/w bit 2 00 0 0 0 0 0 0 0 0 command register address 3 da 1 1 0 1 1 0 1 0 data of the command register
revision history AN2507 30/31 figure 22. i 2 c bus packets timing for a flash lasting longer than ftim max 9 revision history 1.0s 1.5s 1.5s 4.0s trig pin trig_en bit i 2 c bus packets timeout of the first flash timeout of the second flash timeout of the third flash timeout of the fourth flash ? ending of the whole flash p ulse 1.5s 1.0s 1.0s 1.0s 1.0s table 31. revision history date revision changes 19-apr-2007 1 initial release
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